Chips / AI hardware Chips & Hardware AI jobs in Austin
AI roles at Austin AI companies, checked every night: every Austin role at AI-native companies, AI roles at AI-powered ones. Newest first, by the day we first saw them.
422 open roles · page 3 of 9
- Firmware Systems Design EngineerAMD · First seen Oct 7, 2026
- CPU RTL Design EngineerAMD · Posted ~Oct 6, 2026
- Senior AI Systems Performance EngineerAMD · Posted ~Oct 6, 2026
- AI Systems Performance EngineerAMD · Posted ~Oct 6, 2026
- Principal SLT Test EngineerGraphcore · First seen Oct 6, 2026
- Senior SLT Test EngineerGraphcore · First seen Oct 6, 2026
- Sr. Product Development EngineerAMD · Posted ~Oct 6, 2026
- Data Center GPU and AI Embedded Firmware ArchitectAMD · Posted ~Oct 6, 2026
- Senior ASIC Verification EngineerNVIDIA · Posted ~Oct 5, 2026
- Senior Verification Engineer, SoCNVIDIA · Posted ~Oct 5, 2026
- GPU PCIe and Boot Architect - New College Grad 2027NVIDIA · Posted ~Oct 5, 2026
- PCIe Design Verification Intern - Summer 2027NVIDIA · Posted ~Oct 5, 2026
- Senior System Software Engineer - PerformanceNVIDIA · Posted ~Oct 5, 2026
- Senior DL Compiler Engineer - CUDA Tile LPUNVIDIA · Posted ~Oct 5, 2026
- ASIC Design Engineer – Clocks IPNVIDIA · Posted ~Oct 5, 2026
- Senior ASIC Design Engineer – Clocks IPNVIDIA · Posted ~Oct 5, 2026
- Senior Mask Layout Design EngineerNVIDIA · Posted ~Oct 5, 2026
- Senior Software Architect - Data Center SystemsNVIDIA · Posted ~Oct 5, 2026
- Senior Manager, Soc Power ModelingAMD · Posted ~Oct 5, 2026
- Senior GPU Performance Software EngineerAMD · Posted ~Oct 5, 2026
- Senior ASIC Verification EngineerNVIDIA · Posted ~Oct 4, 2026
- Senior ASIC Timing EngineerNVIDIA · Posted ~Oct 4, 2026
- Senior Applied Power Architect - GPUNVIDIA · Posted ~Oct 4, 2026
- Senior Software Architect - Deep Learning and HPC CommunicationsNVIDIA · Posted ~Oct 4, 2026
- Principal Software Engineer, Rack-Scale System Software — CSP EngagementsNVIDIA · Posted ~Oct 3, 2026
- Senior Linux Kernel Systems Software Engineer – CSP EngagementsNVIDIA · Posted ~Oct 3, 2026
- Principal Systems/Test Validation EngineerAMD · Posted ~Oct 2, 2026
- Sr. Product Development EngineerAMD · Posted ~Oct 2, 2026
- Post Silicon High-Speed I/O Validation EngineerAMD · Posted ~Oct 2, 2026
- Interconnect Micro-architect/RTL Design EngineerAMD · Posted ~Oct 2, 2026
- Senior Physical Design Interposer EngineerNVIDIA · Posted ~Oct 1, 2026
- Senior ASIC Verification EngineerNVIDIA · Posted ~Oct 1, 2026
- Senior DFT EngineerNVIDIA · Posted ~Oct 1, 2026
- Platform Validation Lead - IO InterfacesAMD · Posted ~Oct 1, 2026
- Manager, SOC Product & Test EngineeringAMD · Posted ~Oct 1, 2026
- ASIC Design Engineer - HardwareNVIDIA · Posted ~Sep 30, 2026
- Senior DFT Engineer - Post SiliconNVIDIA · Posted ~Sep 30, 2026
- AI Methodology Design/CAD EngineerApple · Posted ~Sep 30, 2026
- 3D IC and SoC CAD ENGINEERAMD · Posted ~Sep 30, 2026
- Firmware Architect - Confidential ComputeAMD · Posted ~Sep 30, 2026
- [Agentic AI] AI Runtime & Performance LeadHP Inc. · Posted ~Sep 29, 2026
- [Agentic AI] AI Runtime / ML Model Systems EngineerHP Inc. · Posted ~Sep 29, 2026
- Product Marketing Manager- AI Software & Ecosystem (ROCm)AMD · Posted ~Sep 29, 2026
- Post-Silicon Memory Subsystem Validation EngineerAMD · Posted ~Sep 29, 2026
- Staff Graphics Architecture EngineerAMD · Posted ~Sep 29, 2026
- Senior Physical Design and Timing EngineerNVIDIA · Posted ~Sep 28, 2026
- GPU/SOC Low-Power Feature ArchitectNVIDIA · Posted ~Sep 28, 2026
- Senior Physical Design EngineerNVIDIA · Posted ~Sep 28, 2026
- ASIC Verification EngineerNVIDIA · Posted ~Sep 28, 2026
- Package Design Methodology EngineerNVIDIA · Posted ~Sep 28, 2026