Senior Power Integrity Methodology CAD Engineer
NVIDIA · Austin
This role is closedClosed Oct 18, 2026. NVIDIA is no longer listing it. Their other open roles are below.
WhereAustinUS, CA, Santa Clara · US, TX, Austin
TeamNot listed
PayNot listed
ListedPosted ~Sep 8, 2026 (per NVIDIA)
About the role
Develops EMIR rail analysis and signoff methodologies and workflows for NVIDIA chips. Works with design teams on power and noise analysis.
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